186 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Ruby
		
	
	
	
	
	
			
		
		
	
	
			186 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Ruby
		
	
	
	
	
	
| # typed: true # rubocop:disable Sorbet/StrictSigil
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| # frozen_string_literal: true
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| 
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| require "macho"
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| 
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| module OS
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|   module Mac
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|     module Hardware
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|       module CPU
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|         extend T::Helpers
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| 
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|         # These methods use info spewed out by sysctl.
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|         # Look in <mach/machine.h> for decoding info.
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|         def type
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|           case ::Hardware::CPU.sysctl_int("hw.cputype")
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|           when MachO::Headers::CPU_TYPE_I386
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|             :intel
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|           when MachO::Headers::CPU_TYPE_ARM64
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|             :arm
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|           else
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|             :dunno
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|           end
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|         end
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| 
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|         def family
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|           if ::Hardware::CPU.arm?
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|             ::Hardware::CPU.arm_family
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|           elsif ::Hardware::CPU.intel?
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|             ::Hardware::CPU.intel_family
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|           else
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|             :dunno
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|           end
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|         end
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| 
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|         # True when running under an Intel-based shell via Rosetta 2 on an
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|         # Apple Silicon Mac. This can be detected via seeing if there's a
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|         # conflict between what `uname` reports and the underlying `sysctl` flags,
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|         # since the `sysctl` flags don't change behaviour under Rosetta 2.
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|         def in_rosetta2?
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|           ::Hardware::CPU.sysctl_bool("sysctl.proc_translated")
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|         end
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| 
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|         def features
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|           @features ||= ::Hardware::CPU.sysctl_n(
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|             "machdep.cpu.features",
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|             "machdep.cpu.extfeatures",
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|             "machdep.cpu.leaf7_features",
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|           ).split.map { |s| s.downcase.to_sym }
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|         end
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| 
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|         def sse4?
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|           ::Hardware::CPU.sysctl_bool("hw.optional.sse4_1")
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|         end
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|       end
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|     end
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|   end
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| end
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| 
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| Hardware::CPU.singleton_class.prepend(OS::Mac::Hardware::CPU)
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| 
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| module Hardware
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|   class CPU
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|     class << self
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|       def extmodel
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|         sysctl_int("machdep.cpu.extmodel")
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|       end
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| 
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|       def aes?
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|         sysctl_bool("hw.optional.aes")
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|       end
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| 
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|       def altivec?
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|         sysctl_bool("hw.optional.altivec")
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|       end
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| 
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|       def avx?
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|         sysctl_bool("hw.optional.avx1_0")
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|       end
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| 
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|       def avx2?
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|         sysctl_bool("hw.optional.avx2_0")
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|       end
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| 
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|       def sse3?
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|         sysctl_bool("hw.optional.sse3")
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|       end
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| 
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|       def ssse3?
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|         sysctl_bool("hw.optional.supplementalsse3")
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|       end
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| 
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|       def sse4_2?
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|         sysctl_bool("hw.optional.sse4_2")
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|       end
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| 
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|       # NOTE: This is more reliable than checking `uname`. `sysctl` returns
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|       #       the right answer even when running in Rosetta 2.
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|       def physical_cpu_arm64?
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|         sysctl_bool("hw.optional.arm64")
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|       end
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| 
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|       def virtualized?
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|         sysctl_bool("kern.hv_vmm_present")
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|       end
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| 
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|       def arm_family
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|         case sysctl_int("hw.cpufamily")
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|         when 0x2c91a47e             # ARMv8.0-A (Typhoon)
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|           :arm_typhoon
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|         when 0x92fb37c8             # ARMv8.0-A (Twister)
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|           :arm_twister
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|         when 0x67ceee93             # ARMv8.1-A (Hurricane, Zephyr)
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|           :arm_hurricane_zephyr
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|         when 0xe81e7ef6             # ARMv8.2-A (Monsoon, Mistral)
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|           :arm_monsoon_mistral
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|         when 0x07d34b9f             # ARMv8.3-A (Vortex, Tempest)
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|           :arm_vortex_tempest
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|         when 0x462504d2             # ARMv8.4-A (Lightning, Thunder)
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|           :arm_lightning_thunder
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|         when 0x573b5eec, 0x1b588bb3 # ARMv8.4-A (Firestorm, Icestorm)
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|           :arm_firestorm_icestorm
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|         when 0xda33d83d             # ARMv8.5-A (Blizzard, Avalanche)
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|           :arm_blizzard_avalanche
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|         when 0xfa33415e             # ARMv8.6-A (M3, Ibiza)
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|           :arm_ibiza
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|         when 0x5f4dea93             # ARMv8.6-A (M3 Pro, Lobos)
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|           :arm_lobos
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|         when 0x72015832             # ARMv8.6-A (M3 Max, Palma)
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|           :arm_palma
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|         else
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|           # When adding new ARM CPU families, please also update
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|           # test/hardware/cpu_spec.rb to include the new families.
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|           :dunno
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|         end
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|       end
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| 
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|       def intel_family(_family = nil, _cpu_model = nil)
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|         case sysctl_int("hw.cpufamily")
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|         when 0x73d67300 # Yonah: Core Solo/Duo
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|           :core
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|         when 0x426f69ef # Merom: Core 2 Duo
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|           :core2
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|         when 0x78ea4fbc # Penryn
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|           :penryn
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|         when 0x6b5a4cd2 # Nehalem
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|           :nehalem
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|         when 0x573b5eec # Westmere
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|           :westmere
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|         when 0x5490b78c # Sandy Bridge
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|           :sandybridge
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|         when 0x1f65e835 # Ivy Bridge
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|           :ivybridge
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|         when 0x10b282dc # Haswell
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|           :haswell
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|         when 0x582ed09c # Broadwell
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|           :broadwell
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|         when 0x37fc219f # Skylake
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|           :skylake
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|         when 0x0f817246 # Kaby Lake
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|           :kabylake
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|         when 0x38435547 # Ice Lake
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|           :icelake
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|         when 0x1cf8a03e # Comet Lake
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|           :cometlake
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|         else
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|           :dunno
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|         end
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|       end
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| 
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|       def sysctl_bool(key)
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|         sysctl_int(key) == 1
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|       end
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| 
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|       def sysctl_int(key)
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|         sysctl_n(key).to_i & 0xffffffff
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|       end
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| 
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|       def sysctl_n(*keys)
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|         (@properties ||= {}).fetch(keys) do
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|           @properties[keys] = Utils.popen_read("/usr/sbin/sysctl", "-n", *keys)
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|         end
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|       end
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|     end
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|   end
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| end
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